The Storage Networking Industry Association (SNIA) put on a Persistent Memory Summit in San Jose, highlighting a major initiative of the SNIA Solid State Storage Initiative (SSSI). Persistent memory (PM) is solid-state memory providing high performance that can retain data for longer than DRAM memory without refreshing the data in the device. The Summit included experts from companies and analysts exploring the implications and implementation of various approaches to PM.
Current PM includes flash memory in PCIe interface storage devices, increasingly using the NVMe protocol. It also includes flash and DRAM/Flash devices using the computer memory bus, often referred to as NVDIMM’s of various sorts. The Figure below from Jim Handy and Tom Coughlin’s presentation shows a comparison of input/output operations per second (IOPS) of various digital storage and memory devices.
The figure below from Steve Pawlowski of Micron’s presentation shows another view of this range of memory and storage device performance in terms of data latency (the time from when data is sought to when it is available). Storage devices including HDDs and SSDs, even using NVMe protocols are data storage devices under I/O control with performance down to the microsecond range (including Micron’s version of the 3D XPoint memory, QuantX). NVDIMM-P that contain a large quantity of NAND flash provides a high capacity PM while NVDIMM-N with some NAND and a lot of DRAM and traditional DIMMs with all DRAM provide even higher performance but higher memory costs.
NVDIMM’s can be used like traditional block based devices with access through the traditional I/O stack like traditional storage or treated like computer system memory using the Load/Store bus with direct access to stored bits. The figure below shows that the latter approach can lead to very low latencies.
In the future these technologies combined with concepts like the Hybrid Memory Cube could bring processing closer to the memory, offering opportunities for 1,000-fold decreases in the energy required for floating-point calculations.
Andy Rudoff from Intel talked about developments in the SNIA NVM programming model that will be able to take advantage of the higher performance possible with PM. The figure below shows the latest version of the programming model.
On the far right we see a direct memory access of NVDIMM by the application, providing the highest performance. There are further increases possible by going from NAND flash to other faster persistent memory. 3D XPoint was to originally be used in DIMM configurations but now appears to be coming out in NVMe formats instead. At the PM Summit Barry Hoberman from Spin Transfer spoke about how even great performance gains are possible using spin torque transfer MRAM DIMM and other memory devices.
Doug Voigt presented information on three new system interconnect consortia introduced in October 2016 to take advantage of the potential of PM. These consortia are Gen-Z, Open CAPI and CCIX. The figure below compares these three interconnect concepts.
Paul Grun from Cray spoke about the OpenFabric Alliance that seeks high performance networked devices. These technologies using remote direct memory access (RDMA) technology originally developed over InfiniBand and now available with various technologies over Ethernet networks. RDMA with PM allows new network storage architectures and will be incorporated in the next generation of network storage technologies.
The replacement of DRAM memory requiring frequent data updating by new persistent memory options appears to be underway. This change will fundamentally change computer architectures, improving performance and lowering power requirements.
